pico-ice
by tinyvision-ai-inc
100 parts · 23 × 61 mm
heypcb · Circuit World · Community board
Ice Core: iCE40 FPGA + RP2040 board, 6 layers
by Inky Ganbold@inky
Lattice iCE40UP5K FPGA (open toolchain) with 8 MB APS6404L QSPI PSRAM, three Pmod host ports and an RGB LED; an RP2040 is the USB-C bridge, FPGA programmer and clock. 6 layers (3 signal + GND / 3V3 / GND planes), 80 x 60 mm, 78 parts, via in the exposed pads. ERC 0, routed 234 -> 0 open, DRC 0 / 0 / 0, closest via holes 0.507 mm. Not fabricated yet; no gateware yet. Files: github.com/enkhbold470/ice-core
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Write a note about this board- Board size
- 80 × 60 mm
- Parts
- 78 parts
- Nets
- 99 nets
- Licence
- CERN-OHL-S v2
Published Oct 2, 2026
Published snapshot
Stored error counts · DRC: 0 · ERC: 0
fpgaice40rp2040pmod
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